To operate efficiently across a wide range of workloads with varying power
requirements, a modern processor applies different current management
mechanisms, which briefly throttle instruction execution while they adjust
voltage and frequency to accommodate for power-hungry instructions (PHIs) in
the instruction stream. Doing so 1) reduces the power consumption of non-PHI
instructions in typical workloads and 2) optimizes system voltage regulators’
cost and area for the common use case while limiting current consumption when
executing PHIs.

However, these mechanisms may compromise a system’s confidentiality
guarantees. In particular, we observe that multilevel side-effects of
throttling mechanisms, due to PHI-related current management mechanisms, can be
detected by two different software contexts (i.e., sender and receiver) running
on 1) the same hardware thread, 2) co-located Simultaneous Multi-Threading
(SMT) threads, and 3) different physical cores.

Based on these new observations on current management mechanisms, we develop
a new set of covert channels, IChannels, and demonstrate them in real modern
Intel processors (which span more than 70% of the entire client and server
processor market). Our analysis shows that IChannels provides more than 24x the
channel capacity of state-of-the-art power management covert channels. We
propose practical and effective mitigations to each covert channel in IChannels
by leveraging the insights we gain through a rigorous characterization of real

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